Fabricated two-sided millimeter wave antenna using through-silicon-vias

ABSTRACT

A system may include a first semiconductor substrate having a first side and a second side opposite the first side. The system may further include multiple device layers positioned on the first side of the substrate. The system may also include a first portion of an antenna structure positioned within at least one of the multiple device layers. The system may include a second portion of the antenna structure positioned over the second side of the substrate. The system may further include a via passing through the substrate and electrically coupling the first portion of the antenna structure to the second portion of the antenna structure.

FIELD

The embodiments described herein relate to fabricated two-sidedmillimeter wave antenna using through-silicon-vias.

BACKGROUND

As computing devices become more integrated into society, data accessand mobility is becoming more important to a typical consumer. Compactwireless computing devices, such as cell phones, tablets, laptops, etc.,are becoming faster, smaller, and more mobile. In order to meet thedemands of new generation products, processing and memory packageswithin mobile devices must become faster and more compact. 5thGeneration Wireless Systems (5G) provide high throughput, low latency,high mobility, and high connection density. Making use of millimeterwave bands (24-86 GHz) for mobile data communication is beneficial forproducing 5G systems.

Antennas used for millimeter wave communication typically include anantenna array deposited on a printed circuit board (PCB) within a mobiledevice. The area, or real estate, occupied by the antennas may decreasethe density of devices attached to the PCB and may result in larger,less mobile devices. By including the antenna within a device layer ofan integrated circuit, space may be saved on the PCB. However, thedevice layer may not include enough space for a complete antenna usablefor millimeter wave communication. Other disadvantages may exist.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to a semiconductor device.

FIG. 2 is a schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to a semiconductor device assembly.

FIG. 3 is a schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to a semiconductor device assembly.

FIG. 4 is a schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to a semiconductor package.

FIG. 5 is a schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to stacked semiconductor packages.

FIG. 6 is a schematic diagram depicting an embodiment of a semiconductorsystem, which may correspond to stacked semiconductor packages.

FIG. 7 is flow diagram depicting an embodiment of a method for forming atwo-sided millimeter wave antenna.

FIG. 8 is flow diagram depicting an embodiment of a method for forming atwo-sided millimeter wave antenna.

While the disclosure is susceptible to various modifications andalternative forms, specific embodiments have been shown by way ofexample in the drawings and will be described in detail herein. However,it should be understood that the disclosure is not intended to belimited to the particular forms disclosed. Rather, the intention is tocover all modifications, equivalents and alternatives falling within thescope of the disclosure as defined by the appended claims.

DETAILED DESCRIPTION

In this disclosure, numerous specific details are discussed to provide athorough and enabling description for embodiments of the presentdisclosure. One of ordinary skill in the art will recognize that thedisclosure can be practiced without one or more of the specific details.Well-known structures and/or operations often associated withsemiconductor devices may not be shown and/or may not be described indetail to avoid obscuring other aspects of the disclosure. In general,it should be understood that various other devices, systems, and/ormethods in addition to those specific embodiments disclosed herein maybe within the scope of the present disclosure.

The term “semiconductor device assembly” can refer to an assembly of oneor more semiconductor devices, semiconductor device packages, and/orsubstrates, which may include interposers, supports, and/or othersuitable substrates. The semiconductor device assembly may bemanufactured as, but not limited to, discrete package form, strip ormatrix form, and/or wafer panel form. The term “semiconductor device”generally refers to a solid-state device that includes semiconductormaterial. A semiconductor device can include, for example, asemiconductor substrate, wafer, panel, or a single die from a wafer orsubstrate. A semiconductor device may further include one or more devicelayers deposited on a substrate. A semiconductor device may refer hereinto a semiconductor die, but semiconductor devices are not limited tosemiconductor dies.

The term “semiconductor device package” can refer to an arrangement withone or more semiconductor devices incorporated into a common package. Asemiconductor package can include a housing or casing that partially orcompletely encapsulates at least one semiconductor device. Asemiconductor package can also include a substrate that carries one ormore semiconductor devices. The substrate may be attached to orotherwise incorporate within the housing or casing.

As used herein, the terms “vertical,” “lateral,” “upper,” and “lower”can refer to relative directions or positions of features in thesemiconductor devices and/or semiconductor device assemblies shown inthe Figures. For example, “upper” or “uppermost” can refer to a featurepositioned closer to the top of a page than another feature. Theseterms, however, should be construed broadly to include semiconductordevices and/or semiconductor device assemblies having otherorientations, such as inverted or inclined orientations wheretop/bottom, over/under, above/below, up/down, and left/right can beinterchanged depending on the orientation.

Various embodiments of this disclosure are directed to semiconductordevices, semiconductor device assemblies, semiconductor packages, andmethods of making and/or operating semiconductor devices. In oneembodiment of the disclosure a system includes a first semiconductorsubstrate having a first side and a second side opposite the first side.The system further includes multiple device layers positioned on thefirst side of the substrate. The system also includes a first portion ofan antenna structure positioned within at least one of the multipledevice layers. The system includes a second portion of the antennastructure positioned over the second side of the substrate. The systemfurther includes a via passing through the substrate and electricallycoupling the first portion of the antenna structure to the secondportion of the antenna structure.

In another embodiment, a system includes a first semiconductor devicehaving a first side and a second side opposite the first side. Thesystem further includes a mold compound region adjacent to thesemiconductor device. The system also includes a redistribution layerpositioned on the first side of the semiconductor device. The systemincludes a first portion of an antenna structure formed within theredistribution layer. The system further includes a second portion ofthe antenna structure positioned over the second side of the firstsemiconductor device. The system also includes a via passing through themold compound region and electrically coupling the first portion of theantenna structure to the second portion of the antenna structure.

Referring to FIG. 1, a semiconductor system 100 is depicted. As depictedin FIG. 1, the system 100 may correspond to a semiconductor device. Thesystem 100 may include a semiconductor substrate 102 and one or moredevice layers 104. The device layers 104 may interact with thesemiconductor substrate 102 to perform various electronic functions. Forexample, the device layers 104 and the substrate 102 may form processingelements, memory elements, and/or other types of electrical elements.The semiconductor substrate 102 may be a silicon substrate or anothertype of semiconductor material.

The device layers 104 may include at least one layer, or a portion of alayer, that defines a first portion 106 of an antenna structure. Forexample, the device layer 104 may include multiple metal layers (e.g.,M1-M8), where one of the metal layers (e.g., M5) may be dedicated, orpartially dedicated, to defining the first portion 106 of the antennastructure. As such, the first portion 106 of the antenna structure maybe integrated within the device layers 104 on a first side 107 of thesemiconductor substrate 102. The first side 107 may correspond to anactive side or device side.

A second portion 112 of the antenna structure may be positioned over asecond side 109 of the semiconductor substrate 102. The second side 109may include additional space to meet area requirements that may beassociated with a particular antenna. Together, the first portion 106and the second portion 112 may define a millimeter wave antenna for usewith 5th Generation cellular data systems.

The semiconductor substrate 102 may include a via 108 passingtherethrough. The via 108 may be a through-silicon-via and mayelectrically couple the first portion 106 of the antenna structure withthe second portion 112 of the antenna structure. In some embodiments,additional layers 114, such as radio frequency shielding, insulatorbarriers, etc., may be positioned between the second portion 112 of theantenna structure and the semiconductor substrate 102. Electricalconnections 110 may provide conductive paths through the device layers104 and the additional layers 114 in order to electrically couple thefirst portion 106 and the second portion 112 of the antenna structure.

During operation, devices formed by the semiconductor substrate 102 andthe device layers 104 may include radio circuitry, such as atransmitter, receiver, or transceiver. The radio circuitry may becommunicatively coupled with the first portion 106 of the antenna.Together, the second portion 112 and the first portion 106 may transmitand receive airborne radio signals, which can be generated and/orprocessed by the radio circuitry.

An advantage of the system 100 is that by including antenna circuitrywithin both the device layers 104 on the first side 107 of thesemiconductor substrate 102 and over the second side 109 of thesemiconductor substrate, a sufficient area may be dedicated to acomplete antenna to enable millimeter wave transmissions. This isparticularly beneficial if a layer that includes the first portion 106of the antenna structure does not, on its own, have enough areaavailable to define a complete millimeter wave antenna. Other advantagesmay exist.

Referring to FIG. 2, a semiconductor system 200 is depicted. The system200 may correspond to a semiconductor device assembly and may includemultiple semiconductor devices. For example, the system 200 may includea semiconductor substrate 102 having a first side 107 (e.g., an activeside) and a second side 109, opposite the first side 107. The system 200may further include one or more device layers 104 positioned on thefirst side 107 of the substrate 102.

A first portion 106 of an antenna structure may be positioned within thedevice layers 104. A second portion 112 of the antenna structure may bepositioned over the second side 109 of the semiconductor substrate 102.As used herein, “positioned over” means that the second portion 112 ispositioned on an opposite side of the substrate 102 than the firstportion 106 of the antenna structure, and may have multiple layers,substrates, or devices positioned between the second portion 112 of theantenna structure and the substrate 102.

The system 200 may include a second substrate 202. The second substrate202 may include intermediate layers 204 such as additional device layersand/or interconnects. For example, the second substrate 202 and theintermediate layers 204 may correspond to a second semiconductor devicethat may be coupled to the substrate 102 in a stacked chipconfiguration. In an embodiment, the substrate 102 and the device layers104 may correspond to an application processor or another type ofprocessing architecture. The second substrate 202 and intermediatelayers 204 may correspond to a memory device, such as a dynamic randomaccess memory array. The system 200 may also include additional layers114 separating the second portion 112 of the antenna structure from thesecond substrate 202. However, in some embodiments, the additionallayers 114 may be omitted and the second portion 112 of the antennastructure may be deposited directly on the second substrate 202.

The first portion 106 of the antenna structure and the second portion112 of the antenna structure may be electrically coupled by a via 108passing through the substrate 102 and by a second via 206 passingthrough the second substrate 202. Various electrical connections 110 maybe present to complete the electrical connection between the firstportion 106 and the second portion 112.

An advantage of the system 200 is that by including antenna circuitrywithin both the device layers 104 on the first side 107 of thesemiconductor substrate 102 and over the second side 109 of thesemiconductor substrate, a sufficient area may be dedicated to acomplete antenna to enable millimeter wave transmissions. Further, asecond substrate 202 may be positioned between the first portion 106 andthe second portion 112, which may increase the functionality of thesystem 200 without reducing the effectiveness of the antenna structure.Other advantages may exist.

Referring to FIG. 3, a semiconductor system 300 is depicted. The system300 may correspond to a semiconductor device assembly and may includemultiple semiconductor devices. Similar to the system 200, the system300 may include a first substrate 102 and a second substrate 202, withdevice layers 104 including a first portion 106 of an antenna structureformed on the substrate 102. The system 200 may include a second portion112 of the antenna structure formed over the substrate 102. The firstportion 106 and the second portion 112 may be electrically coupled byvias 108, 206 passing through the substrate 102 and the second substrate202, respectively.

In addition to the substrate 102 and the second substrate 202, thesystem 300 may include any number of additional substrates 302 havingadditional intermediate layers 304. Each of the additional substrates302 may have additional vias 306 passing therethrough. The vias 108, 206and the additional vias 306 may electrically couple the first portion106 to the second portion 112. Further, additional electricalconnections 110 may complete the connection through the device layers104, the intermediate layers 204, the additional intermediate layers304, and any additional layers 114, if present.

FIG. 3 demonstrates that the system 300 may include any number ofstacked semiconductor devices between the first portion 106 and thesecond portion 112 of the antenna structure. The system 300 may beimplemented, for example, in three-dimensional stacked integratedcircuits, and may be usable for millimeter wave communication and 5Gcommunications.

Referring to FIG. 4, a semiconductor system 400 is depicted. The system400 may correspond to a semiconductor package. The system 400 mayinclude a semiconductor device 402 having a first side 403 and a secondside 405. The semiconductor device 402 may be packaged within a moldcompound 404, positioned adjacent to the semiconductor device 402.

A redistribution layer 406 may be positioned on the first side 403 ofthe semiconductor device 402. The redistribution layer 406 may include afirst sublayer 408 and a second sublayer 410. The first sublayer 408 maybe configured to route a set of connections 422 from the semiconductor402 device to a surface mount coupling structure 420. In an embodiment,the surface mount coupling structure may include a ball grid array. Thesecond sublayer 410 may define a first portion 412 of an antennastructure formed therein.

A second portion 414 of the antenna structure may be formed over thesecond side 405 of the semiconductor device 402. One or more interveninglayers 418 may optionally be positioned between the mold compound 404and/or the semiconductor device 402 and the second portion 414 of theantenna structure. For example, the one or more intervening layers 418may include additional mold compound, radio frequency shielding,insulator barriers, etc. A via 416 may pass through the mold compoundand may electrically couple the first portion 412 of the antennastructure with the second portion 414 of the antenna structure.

An advantage of the system 400 is that by including antenna circuitrywithin both the redistribution layer 406 on the first side 403 of thesemiconductor device 402 and over the second side 405 of thesemiconductor device 402, a sufficient area may be dedicated to acomplete antenna to enable millimeter wave transmissions. Otheradvantages may exist.

Referring to FIG. 5, a semiconductor system 500 is depicted. Thesemiconductor system 500 may correspond to stacked semiconductorpackages. The system 500 may include a semiconductor device 402 having afirst side 403 and a second side 405. The system 500 may further includea mold compound 404 adjacent to the semiconductor device 402. Aredistribution layer 406 may perform routing to couple a set ofconnections 422 from the semiconductor device 402 to a surface mountcoupling structure 420.

The redistribution layer 406 may include a first sublayer 408 and asecond sublayer 410. A first portion 412 of an antenna structure may beformed within the second sublayer 410. A second portion 414 of theantenna structure may be formed on a second semiconductor device 502 andmay be positioned over the second side 405 of the semiconductor device402. The second semiconductor device 502 may correspond to a packageddevice and may be coupled to the semiconductor device 402 in apackage-on-package configuration. A stack interconnect structure 504 mayelectrically couple the second semiconductor device 502 to thesemiconductor device 402 through a set of vias 508 and through the moldcompound 404.

A via 416 through the mold compound 404 and a via 506 through the secondsemiconductor device 502 may electrically couple the first portion 412of the antenna structure with the second portion 414 of the antennastructure. The system 500 may further include one or more interveninglayers 418 between the mold compound 404 and/or semiconductor device 402and the second semiconductor device 502.

An advantage of the system 500 is that by including antenna circuitrywithin both the redistribution layer 406 and on the second semiconductordevice 502, a sufficient area may be dedicated to a complete antenna toenable millimeter wave transmissions. Further, the antenna structure mayspan semiconductor packages. Other advantages may exist.

Referring to FIG. 6, a semiconductor system 600 is depicted. Thesemiconductor system 600 may correspond to multiple stackedsemiconductor packages. The system 600 may include a semiconductordevice 402 having a first side 403 and a second side 405. The system 600may further include a mold compound 404 adjacent to the semiconductordevice 402. A redistribution layer 406 may perform routing to couple aset of connections 422 from the semiconductor device 402 to a surfacemount coupling structure 420.

The redistribution layer 406 may include a first sublayer 408 and asecond sublayer 410. A first portion 412 of an antenna structure may beformed within the second sublayer 410. A second portion 414 of theantenna structure may be formed on a second semiconductor device 502 andmay be positioned over the second side 405 of the semiconductor device402. The system 600 may further include one or more interveningsemiconductor devices 602. The second semiconductor device 502 and theintervening semiconductor device 602 may correspond to packaged devicesand may be coupled to the semiconductor device 402 in apackage-on-package configuration. A stack interconnect structure 504 mayelectrically couple the second semiconductor device 502 to interveningsemiconductor device 602 and a corresponding intervening stackinterconnect structure 604 may couple the intervening semiconductordevice 602 to the semiconductor device 402. Connections between thesemiconductor device 402 may be made with the intervening semiconductordevice 602 through a set of vias 508 in the mold compound 404 andthrough the redistribution layer 406. Although not depicted in FIG. 6,additional connections may be made between the intervening semiconductordevice 602 and the second semiconductor device 502.

A via 416 through the mold compound 404, a via 506 through the secondsemiconductor device 502, and a via 606 through the interveningsemiconductor device 602 may electrically couple the first portion 412of the antenna structure with the second portion 414 of the antennastructure. The system 500 may also include one or more interveninglayers 418 between the mold compound 404 and/or the semiconductor device402 and the intervening semiconductor device 602. Although, not depictedin FIG. 6, the system 600 may include multiple intervening devices 602as may be desirable for a particular application.

FIG. 6 demonstrates that the system 600 may include any number ofstacked semiconductor devices between the first portion 412 and thesecond portion 414 of the antenna structure. The system 600 may beimplemented, for example, in three-dimensional stacked integratedcircuits and/or package on package configurations, and may also beusable for millimeter wave communication and 5G communications.

FIG. 7 depicts a method 700 for forming a two-sided millimeter waveantenna. The method 700 may include forming a first portion of anantenna structure within at least one device layer of multiple devicelayers positioned on a first side of a semiconductor substrate, at 702.For example, the first portion 106 of the antenna structure of FIG. 1may be formed within the device layers 104 positioned on the first side107 of the semiconductor substrate 102.

The method 700 may further include forming a via through a substrate ofthe semiconductor device, at 704. For example, the via 108 may be formedthrough the substrate 102.

The method 700 may also include positioning a second portion of theantenna structure over a second side of the semiconductor substrate, thevia electrically coupling the first portion of the antenna structure andthe second portion of the antenna structure, at 706. For example, thesecond portion 112 of the antenna structure may be positioned over thesecond side 109 of the semiconductor substrate 102.

An advantage of the method 700 is that a semiconductor system, e.g., anintegrated circuit device, may be formed with an antenna that hassufficient area for millimeter wave communication, even when the amountof area within the device layers 104 is limited. Other advantages mayexist.

FIG. 8 depicts a method 800 for forming a two-sided millimeter waveantenna. The method 800 may include forming a mold compound regionadjacent to a first semiconductor device, at 802. For example, the moldcompound 404 may be formed adjacent to the semiconductor device 402.

The method 800 may further include forming a via through the moldcompound region, at 804. For example, the via 416 may be formed throughthe mold compound 404.

The method 800 may also include forming a redistribution layerpositioned on a first side of the first semiconductor device, theredistribution layer defining a first portion of an antenna structure,at 806. For example, the redistribution layer 406, including the firstportion 412 of the antenna structure of FIG. 4, may be formed on thefirst side 403 of the semiconductor device 402.

The method 800 may include positioning a second portion of the antennastructure over a second side of the first semiconductor device, at 808.For example, the second portion 414 of the antenna structure may beformed over the second side 405 of the semiconductor device 402.

The method 800 may further include electrically coupling the firstportion of the antenna structure with the second portion of the antennastructure by the via, at 810. For example, the first portion 412 and thesecond portion 414 may be electrically coupled by the via 416 throughthe mold compound region 404.

An advantage of the method 800 is that a semiconductor system, e.g., apackaged integrated circuit device, may be formed with an antenna thathas sufficient area for millimeter wave communication, even when theamount of area within the redistribution layer 406 is limited. Otheradvantages may exist.

Although this disclosure has been described in terms of certainembodiments, other embodiments that are apparent to those of ordinaryskill in the art, including embodiments that do not provide all of thefeatures and advantages set forth herein, are also within the scope ofthis disclosure. The disclosure may encompass other embodiments notexpressly shown or described herein. Accordingly, the scope of thepresent disclosure is defined only by reference to the appended claimsand equivalents thereof.

What is claimed is:
 1. A system comprising: a first semiconductor devicehaving a first side and a second side opposite the first side; a moldcompound region adjacent to the semiconductor device; a redistributionlayer positioned on the first side of the semiconductor device; a firstportion of an antenna structure formed within the redistribution layer;a second portion of the antenna structure positioned over the secondside of the first semiconductor device; and a via passing through themold compound region and electrically coupling the first portion of theantenna structure to the second portion of the antenna structure.
 2. Thesystem of claim 1, further comprising: one or more intervening layersbetween the second portion of the antenna and the mold compound region.3. The system of claim 1, further comprising: a second semiconductordevice stacked onto the first semiconductor device.
 4. The system ofclaim 3, further comprising: one or more intervening semiconductordevices positioned between the first semiconductor device and the secondsemiconductor device.
 5. The system of claim 1, wherein theredistribution layer includes a first sublayer and a second sublayer. 6.The system of claim 1, wherein the antenna structure is a millimeterwave antenna.
 7. The system of claim 2, wherein the one or moreintervening layers includes additional mold compound.
 8. The system ofclaim 2, wherein the one or more intervening layers includes radiofrequency shielding.
 9. The system of claim 2, wherein the one or moreintervening layers includes insulator barriers.
 10. The system of claim3, wherein the second portion of the antenna structure is positioned onthe second semiconductor device.
 11. The system of claim 3, wherein thesecond semiconductor device corresponds to a packaged device.
 12. Thesystem of claim 3, wherein the second semiconductor device is coupled tothe first semiconductor device in a package-on-package configuration.13. The system of claim 3, wherein a stack interconnect structureelectrically couples the second semiconductor device to the firstsemiconductor device.
 14. The system of claim 4, wherein the secondsemiconductor device and the intervening semiconductor devices arecoupled to the first semiconductor device in a package-on-packageconfiguration.
 15. The system of claim 4, wherein each of theintervening semiconductor devices has a substrate and a via passingthrough the substrate.
 16. The system of claim 15, wherein the firstportion of the antenna structure is electrically coupled to the secondportion of the antenna structure by the via.
 17. The system of claim 5,wherein the first sublayer is configured to route a set of connectionsfrom the first semiconductor device to a surface mount couplingstructure.
 18. The system of claim 17, wherein the surface mountcoupling structure includes a ball grid array.
 19. The system of claim5, wherein the second sublayer includes the first portion of theantenna.